In bipolar power transistors a trade-off exists between the collector-emitter breakdown voltage BVCEO and the cut-off frequency FT.
FIG. 1 shows a prior art vertical npn power transistor. The particular BJT shown is a symmetric structure with base contacts 100 to base 102. The base 102 is formed below and extends to either side of a polysilicon emitter 104 with its emitter contact 106. An emitter-base spacer 108 is shown on either side of the emitter poly 104. Symmetrically positioned collector contacts 110, contact an n-buried layer (NBL) regions 112 through sinkers 114 to connect to an n-epitaxial region that defines an n-type collector 118. This symmetric structure with NBL pull-back thus defines a collector-base-emitter-base-collector (CBEBC) layout. It will be appreciated that the emitter-base-collector define a vertical npn structure with a lateral collector link-up (in this case, the emitter poly is n-doped and the base is p-doped). The BJT is formed as part of a Silicon over Isolator (SOI) structure as depicted by the
SOI layer 120. By using a SOI structure and defining a symmetric collector arrangement, the BJT is less sensitive to defects in the NBL and is suitable for high voltage applications. It relies on standard BiCMOS process flows and can easily be integrated for high voltage options with the addition of SOI (or by using a deeper well to provide isolation in bulk silicon) and only a minor modification of the intrinsic collector region to support the vertical/lateral breakdown voltages of the desired device). However a disadvantage of the prior art structure of FIG. 1 is that it places the collector contacts far from the emitter region in the case of a laterally contacted collector, while in the case of purely vertical device in order to get higher voltages you need a much thicker epitaxial region or in the case of multiple breakdown devices you need multiple implant regions that may not be compatible with a given buried layer, thereby providing for a long transit time distance for carriers and high base-collector capacitance CBC which slows switching resulting in reduced cut-off frequency FT. The present application seeks to address some of the problems associated with the prior art devices by providing a vertical power BJT with control over the BVCEO/FT characteristics, by using a bias shield.